| 摘要 |
PROBLEM TO BE SOLVED: To solve the problem that it is difficult for each CPU to appropriately detect the completion timing of the configuration of an FPGA(Field Programmable Gate Array) in a configuration in which a plurality of CPU share the FPGA.SOLUTION: The information processor includes: a programmable processing part capable of rewriting processing content by a configuration; and at least two control parts sharing the programmable processing part. One control part between at least two control parts includes: control means for controlling the configuration of the programmable processing part in accordance with a received job; and notification means for notifying the control part different from one control part among at least two control parts, that is, the control part for processing the job by using the programmable processing part of information indicating that the job becomes executable after the configuration.SELECTED DRAWING: Figure 1 |
