| 摘要 |
A transceiver circuit comprising a front-end (FE1) and a back-end (BE1) is provided. The front-end (FE1) comprises terminals (T1, T2) for coupling to a first and a second capacitor (C1, C2) and tunable resistors (R1, R2) coupled between the terminals (T1, T2) and a reference terminal (VSS). The front-end (FE1) is configured to receive receiver signals at the terminals (T1, T2) utilizing a first setting for the resistors (R1, R2). The front-end (FE1) is configured to generate a receiver data packet based on the receiver signals. The back-end (BE1) is configured to check the receiver data packet for errors with respect to a defined tuning data packet. If an error is found, the back-end (BE1) sets the resistors (R1, R2) to a default setting. If no errors are found, the back-end (BE1) sets the resistors (R1, R2) to a second setting. |
