发明名称 SCAN PATH FOR TEST MODE WITH SIGNAL DELAY ELEMENTS BY DELAY CIRCUITS HAVING DIFFERENT SUPPLY VOLTAGES
摘要 A method for signal delay in test mode comprises, in a scan mode, delaying a scan signal in a scan path (fig. 1) by propagating the scan signal through a plurality of delay devices (125a, 125b, 125c) coupled in series, wherein a first one of the delay devices is powered by a first voltage, a second one of the delay devices is powered by a second voltage, and the second voltage is greater than the first voltage. The method also comprises, in a functional mode, disabling the delay devices.
申请公布号 WO2016069203(A1) 申请公布日期 2016.05.06
申请号 WO2015US53878 申请日期 2015.10.02
申请人 QUALCOMM INCORPORATED 发明人 DATTA, ANIMESH;YE, QI;DILLEN, STEVEN JAMES
分类号 G11C29/32;G01R31/3185;G11C7/10 主分类号 G11C29/32
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