发明名称 Apparatus and Method for Managing Memory
摘要 An apparatus for managing a memory having a plurality of command/address pins is provided. The apparatus includes a command generating module and a control module. The command generating module generates a set of target commands. The set of target commands include a plurality of command groups. Each of the command groups corresponds to at least one command/address pin of the plurality of command/address pins. It is known that the memory accesses the set of target commands from the plurality of command/address pins at a target time point. The control module controls the command groups to have different transition times prior to the target time points when the command groups are transmitted on the plurality of command/address pins.
申请公布号 US2016124648(A1) 申请公布日期 2016.05.05
申请号 US201514876043 申请日期 2015.10.06
申请人 MStar Semiconductor, Inc. 发明人 Chang Yung;Lin Chen-Nan;Chen Chung-Ching
分类号 G06F3/06 主分类号 G06F3/06
代理机构 代理人
主权项 1. An apparatus for managing a memory having a plurality of command/address pins, comprising: a command generating module, configured to generate a set of target commands, the set of target commands comprising a plurality of command groups, each of the command groups corresponding to at least one command/address pin of the plurality of command/address pins, the memory accessing the set of target commands from the plurality of command/address pins at a target time point; and a control module, configured to control the command groups to respectively transition at different time points prior to the target time point.
地址 Hsinchu Hsien TW