| 发明名称 |
MEMORY CONTROL CIRCUIT AND IMAGE FORMING APPARATUS |
| 摘要 |
A memory control circuit includes a writing unit configured to receive image data that is input and write the image data into a memory; a first reading unit configured to read the image data written in the memory and output the image data to a determination unit that determines a type of image of the image data; and a second reading unit configured to read the image data written in the memory and output the image data to an image processing unit that performs image processing according to a determination result obtained by the determination unit. When the second reading unit is outputting the image data to the image processing unit, the first reading unit outputs image data, which is input subsequently to the input of the image data, to the determination unit. |
| 申请公布号 |
US2016127613(A1) |
申请公布日期 |
2016.05.05 |
| 申请号 |
US201514923596 |
申请日期 |
2015.10.27 |
| 申请人 |
KATSUNOI Ichiro |
发明人 |
KATSUNOI Ichiro |
| 分类号 |
H04N1/64;H04N1/60;H04N1/52 |
主分类号 |
H04N1/64 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A memory control circuit comprising:
a writing unit configured to receive image data that is input and write the image data into a memory; a first reading unit configured to read the image data written in the memory and output the image data to a determination unit that determines a type of image of the image data; and a second reading unit configured to read the image data written in the memory and output the image data to an image processing unit that performs image processing according to a determination result obtained by the determination unit, wherein when the second reading unit is outputting the image data to the image processing unit, the first reading unit outputs image data, which is input subsequently to the input of the image data, to the determination unit. |
| 地址 |
Kanagawa JP |
