IMAGE PICKUP APPARATUS

摘要

To provide an image pickup apparatus that can increase capacitance value of an input node in a connection state without decreasing amplification transistor gain when capacitance is in a non-connection state. In an image pickup apparatus according to an aspect of the present disclosure, a gate electrode of an amplification transistor is arranged on a main surface of the semiconductor substrate, a third semiconductor region having a second conductivity type is arranged in a lower part of the gate electrode, and an added impurity concentration of impurity having the second conductivity type on a PN junction surface of a capacitance is higher than a highest value of an added impurity concentration having the second conductivity type in a region from the main surface up to a depth at which a source and a drain of the amplification transistor are arranged in the third semiconductor region.

主权项

1. An image pickup apparatus comprising:
a photoelectric conversion unit; an amplification transistor configured to amplify a signal based on charges generated by the photoelectric conversion unit; a capacitance that has a PN junction constituted by a first semiconductor region having a first conductivity type and a second semiconductor region having a second conductivity type and can accumulate the charges; and a plurality of pixels that can change a capacitance value of an input node of the amplification transistor by switching a connection state of the capacitance, wherein a gate electrode of the amplification transistor is arranged on a main surface of a semiconductor substrate, and a third semiconductor region having the second conductivity type is arranged in a lower part of the gate electrode of the amplification transistor, and wherein an added impurity concentration of impurity having the second conductivity type on a PN junction surface of the capacitance is higher than a highest value of an added impurity concentration having the second conductivity type in a region from the main surface up to a depth at which a source and a drain of the amplification transistor are arranged in the third semiconductor region.