SYNCHRONISER FLIP-FLOP

摘要

A synchroniser flip-flop is provided, which is able to better respond to input values that are not provided for the necessary setup or hold times. The flip-flop includes a latch that includes inverter circuitry for producing a first signal and a signal in dependence on a value of an input signal at a node. A clocked inverter includes a first switch that is connected between a first reference voltage supply and an intermediate node and a second switch, which is connected between the intermediate node and a second reference voltage supply. The first switch is controlled by the first signal and the second switch is controlled by the second signal to produce an output signal at the intermediate node.

主权项

1. A synchroniser flip-flop comprising a latch, the latch comprising:
inverter circuitry to produce a first signal and a second signal in dependence on a value of an input signal at a node; and a clocked inverter comprising:
a first switch connected between a first reference voltage supply and an intermediate node; anda second switch connected between the intermediate node and a second reference voltage supply, wherein the first switch is controlled by the first signal and the second switch is controlled by the second signal to produce an output signal at the intermediate node.