发明名称 METHOD OF FABRICATING A TUNGSTEN PLUG IN A SEMICONDUCTOR DEVICE
摘要 In an semiconductor process, a seamless tungsten plug is formed in an inter-layer dielectric by forming the inter-layer dielectric from multiple oxide layers having different wet etch rates, from lowest wet-etch rate for the lowest layer to highest wet-etch rate for the highest layer, forming a hole or trench in the inter-layer dielectric using a dry etch process, reconfiguring the hole or trench to have sloped side walls by performing a wet etch step, and filling the hole or trench with tungsten and etching back the tungsten to form a seamless tungsten plug.
申请公布号 US2016126193(A1) 申请公布日期 2016.05.05
申请号 US201414531177 申请日期 2014.11.03
申请人 Texas Instruments Incorporated 发明人 Liu Yunlong;Xiong Yufei;Yang Hong
分类号 H01L23/532;H01L23/522;H01L21/02;H01L21/321;H01L21/768;H01L21/311 主分类号 H01L23/532
代理机构 代理人
主权项 1. A method of fabricating a tungsten plug in an inter-layer dielectric of a semiconductor device comprising, forming the inter-layer dielectric from multiple layers of dielectric material having increasing wet etch rates from the lowest to the highest dielectric material layer, etching a hole through the inter-layer dielectric, and performing a wet etch step to change the configuration of the hole to one that has substantially sloped or tapered side walls.
地址 Dallas TX US