发明名称 GATE DRIVER ON ARRAY CIRCUIT AND LIQUID CRYSTAL DISPLAY DEVICE
摘要 A gate driver on array circuit and a liquid crystal display device are disclosed. The Nth-level GOA unit comprises: a pull-down unit; the pull-down unit comprises a first thin film transistor (TFT) which is connected to the input end of the (n+2)th-level high-frequency clock signal and a pull-down control unit respectively; the first TFT, a pull-up unit and a pull-up control unit are commonly connected to the pull-down point so as to pull-down the electrical potential of the pull-down point, wherein N is a positive integer greater than 3; n is positive integer.
申请公布号 US2016125824(A1) 申请公布日期 2016.05.05
申请号 US201414416139 申请日期 2014.11.05
申请人 Shenzhen China Star Optoelectronics Technology Co., Ltd. 发明人 DAI Chao
分类号 G09G3/36 主分类号 G09G3/36
代理机构 代理人
主权项 1. A GOA (gate driver on array) circuit, comprising multi-level connected GOA units and multi-level high frequency clock signals, each of the multi-level high-frequency clock signals being input through a corresponding-level high-frequency clock signal input end, wherein an Nth-level GOA unit comprises: a first input end of an (N−1)th-level signal, a second input end of the (N−1)th-level signal, an input end of an (n+2)th-level high-frequency clock signal, a first input end, a second input end, a pull-down point, a low-level input end and an input end of an nth-level high-frequency clock signal, wherein N is a positive integer greater than 3; n is positive integer; and n represents a level number of the high-frequency clock signal which is comprised in the GOA circuit; wherein the first input end of the (N−1)th-level signal is connected to a first output end of an (N−1)th-level GOA unit; the second input end of the (N−1)th-level signal is connected to a second output end of the (N−1)th-level GOA unit; the first output end is connected to a first input end of an (N−1)th-level signal of an (N+1)th-level GOA unit; the second output end is connected to a second input end of the (N−1)th-level signal of the (N+1)th-level GOA unit; and the first output end is used to offer a scanning signal to an Nth-level horizontal scan line of a display area; the Nth-level GOA unit further comprising: a pull-up control unit connected to the first input end of the (N−1)th-level signal, the second input end of the (N−1)th-level signal and the pull-down point respectively; the pull-up control unit used to pull up an electrical potential of the pull-down point; a pull-up unit connected to the input end of the nth-level high-frequency clock signal, the first output end and the second output end respectively; wherein the pull-up unit and the pull-up control unit are commonly connected to the pull-down point; and the pull-up unit is used to charge signals of the first output end and the second output end so as to raise the pull-down point to a higher electrical potential; a pull-down control unit connected to the low-level input end, the pull-up control unit, the pull-up unit and the pull-down unit respectively; wherein the pull-down control unit is used to control the pull-down point and the first output end to remain at a low electrical potential when the signal of the first output end is in a non-charging state; and a pull-down unit comprising a first TFT, wherein the first TFT has a first gate, a first source and a first drain; the first gate is electrically connected to the input end of the (n+2)th-level high-frequency clock signal; the first source, the pull-up unit and the pull-up control unit are commonly connected to the pull-down point; and the first drain and the pull-down control unit are commonly connected to the first output end so as to pull-down the electrical potential of the pull-down point; wherein the GOA circuit comprises a first cascade aspect and a second cascade aspect, the first cascade aspect and the second aspect are not mutually cascaded with each other, the first cascade aspect is composed by multiple (2k+1)th-level GOA units cascaded, the second cascade aspect is composed by multiple (2k)th-level GOA units cascaded, and the first cascade aspect and the second cascade aspect are driven independently, wherein k is a positive integer.
地址 Guangdong CN