发明名称 INTERPOSER FOR MULTI-CHIP ELECTRONICS PACKAGING
摘要 An interposer for vertically separating device die is disclosed. The interposer includes a compliant layer comprising a plurality of thermally conductive plugs that are physically disconnected within the plane of the compliant layer, where the space between the plugs is filled with a compliant medium. In some embodiments, at least one of the top and bottom surfaces of the compliant layer is coated with a thin layer of electrically insulating material.
申请公布号 US2016126159(A1) 申请公布日期 2016.05.05
申请号 US201514929479 申请日期 2015.11.02
申请人 The Board of Trustees of the Leland Stanford Junior University 发明人 Majumdar Arunava;Sadat Seid H.;Coso Dusan
分类号 H01L23/373;H05K3/10;H05K3/46;H05K3/00;H01L23/498 主分类号 H01L23/373
代理机构 代理人
主权项 1. An interposer comprising: a compliant layer having a first surface and a second surface, the compliant layer having (1) a first thermal conductivity along a first direction that extends between the first and second surface and a (2) second thermal conductivity along a first plane that is substantially orthogonal with the first direction, wherein the first thermal conductivity is higher than the second thermal conductivity; and a first layer disposed on the first surface of the compliant layer, the first layer being electrically insulating.
地址 Palo Alto CA US