发明名称 MEMORY DEVICE WITH LOW POWER OPERATION MODE
摘要 A memory device that operates in a low-power operation mode includes a memory cell array, a page size changing circuit, and an encoding and decoding changing circuit. The page size changing circuit changes the number of data items prefetched in the memory cell array according to a power mode during a read operation. The encoding and decoding changing circuit changes a level of data written in the memory cell array according to the power mode during a read operation.
申请公布号 US2016125920(A1) 申请公布日期 2016.05.05
申请号 US201514931291 申请日期 2015.11.03
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM HYE-RAN;OH TAE-YOUNG;JANG SEONG-JIN
分类号 G11C7/10;G11C5/14 主分类号 G11C7/10
代理机构 代理人
主权项 1. A memory device comprising: a memory cell array; input/output data type changing circuits comprising a decoding circuit and an encoding circuit, the decoding circuit is configured to decode a data symbol inputted from an external device into internal data for writing into the memory cell array and the encoding circuit configured to encode data bits read from the memory cell array into a data symbol; and data pins configured to communicate with the external device and the input/output data type changing circuits, wherein the data type changing circuits operate in different types of data transmission methods in accordance with a memory device operation power mode.
地址 SUWON-SI KR