发明名称 DRIVING CIRCUIT AND DISPLAY APPARATUS INCLUDING THE SAME
摘要 A driving circuit includes a receiver configured to receive an image control signal comprising a data signal and a clock signal, separate the data signal from the clock signal and output the separated data and clock signals, a clock recovery unit generating a reference clock signal based on the clock signal and generating a plurality of multi-phase clock signals having different phases from that of the reference clock signal, an output clock generation unit outputting an output clock signal in synchronization with the clock signal and the plurality of multi-phase clock signals, and a data output unit driving a plurality of data lines with a data driving signal corresponding to the data signal in synchronization with the output clock signal, and the output clock generation unit outputs the plurality of multi-phase clock signals.
申请公布号 US2016125821(A1) 申请公布日期 2016.05.05
申请号 US201514806971 申请日期 2015.07.23
申请人 Samsung Display Co., LTD. 发明人 LEE Jae-Han;KIM Taegon;SON SUNKYU
分类号 G09G3/36 主分类号 G09G3/36
代理机构 代理人
主权项 1. A driving circuit comprising: a receiver configured to receive an image control signal comprising a data signal and a clock signal, separate the data signal from the clock signal, and output the data and clock signals separated form each other; a clock recovery unit configured to generate a reference clock signal based on the clock signal and generate a plurality of multi-phase clock signals having different phases from that of the reference clock signal; an output clock generation unit configured to output an output clock signal in synchronization with the clock signal and the plurality of multi-phase clock signals; and a data output unit configured to drive a plurality of data lines with a data driving signal corresponding to the data signal in synchronization with the output clock signal, wherein the plurality of data lines is sequentially arrayed in a first direction, and the clock recovery unit outputs the plurality of multi-phase clock signals and adjusts output timing of the data driving signal according to positions of the plurality of data lines in the first direction.
地址 Yongin-City KR