METHOD FOR PERFORMING RANDOM READ ACCESS TO A BLOCK OF DATA USING PARALLEL LUT READ INSTRUCTION IN VECTOR PROCESSORS

摘要

This invention deals with the problem of paralleling random read access within a reasonably sized block of data for a vector SIMD processor. The invention sets up plural parallel look up tables, moves data from main memory to each plural parallel look up table and then employs a look up table read instruction to simultaneously move data from each parallel look up table to a corresponding part a vector destination register. This enables data processing by vector single instruction multiple data (SIMD) operations. This vector destination register load can be repeated if the tables store more used data. New data can be loaded into the original tables if appropriate. A level one memory is preferably partitioned as part data cache and part directly addressable memory. The look up table memory is stored in the directly addressable memory.

主权项

1. A method of data processing according to a predetermined algorithm having at least one data access pattern comprising the steps of:
determining whether overhead of defining look up tables, moving data from memory to the look up tables and moving data to vector registers of each data access pattern is less than overhead of moving data to vector registers by plural scalar loads; and if the overhead of defining look up tables, moving data from memory to the look up tables and moving data to vector registers for a data access pattern is less than overhead of moving data to vector registers by plural scalar loads
setting up plural parallel look up tables,moving data required by the algorithm from main memory to each of said plural parallel look up tables,simultaneously moving data from each of said parallel look up tables to corresponding locations of a vector destination register, andperforming at least one vector single instruction multiple data (SIMD) operation upon data in said vector destination register.