发明名称 Memory Bus Error Signal
摘要 A technique includes receiving, by a device a command, wherein a response to the command is expected from the device within a predetermined response time. The device may selectively generate an error signal to allow time for the device to complete processing the command.
申请公布号 US2016124797(A1) 申请公布日期 2016.05.05
申请号 US201314889973 申请日期 2013.06.27
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 Benedict Melvin K.
分类号 G06F11/07 主分类号 G06F11/07
代理机构 代理人
主权项 1. A method comprising: receiving, by a device, a command, wherein a corresponding response is expected within a predetermined response time; and selectively generating, by the device, an error signal on a memory bus associated with the device to allow time for the device to complete processing the command, wherein the time for the device to complete processing the command is greater than the predetermined response time.
地址 Houston TX US