发明名称 |
INTEGER MULTIPLY AND MULTIPLY-ADD OPERATIONS WITH SATURATION |
摘要 |
Sum and carry signals are formed representing a product of a first and a second operand. A bias signal is formed having a value determined by a sign of a product of the first and the second operand. An output signal is provided based on an addition of the sum signal, the carry signal, a sign-extended addend, and the bias signal. A portion of the output signal, a saturated minimum value, or a saturated maximum value, is selected as a final result based on the sign of the product and a sign of the output signal. |
申请公布号 |
EP2435904(B1) |
申请公布日期 |
2016.05.04 |
申请号 |
EP20100725322 |
申请日期 |
2010.05.24 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
HURD, KEVIN A.;HILKER, SCOTT A. |
分类号 |
G06F7/499;G06F7/53;G06F7/544 |
主分类号 |
G06F7/499 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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