发明名称 |
PROCESSORS, METHODS, AND SYSTEMS TO ACCESS A SET OF REGISTERS AS EITHER A PLURALITY OF SMALLER REGISTERS OR A COMBINED LARGER REGISTER |
摘要 |
A processor of an aspect includes a set of registers capable of storing packed data. An execution unit is coupled with the set of registers. The execution unit is to access the set of registers in at least two different ways in response to instructions. The at least two different ways include a first way in which the set of registers are to represent a plurality of N-bit registers. The at least two different ways also include a second way in which the set of registers are to represent a single register of at least 2N-bits. In one aspect, the at least 2N-bits is to be at least 256-bits. |
申请公布号 |
EP3014419(A1) |
申请公布日期 |
2016.05.04 |
申请号 |
EP20140818729 |
申请日期 |
2014.06.26 |
申请人 |
INTEL CORPORATION |
发明人 |
TOLL, BRET L.;SINGHAL, RONAK;GUY, BUFORD M.;NAIK, MISHALI |
分类号 |
G06F9/06;G06F9/30 |
主分类号 |
G06F9/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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