发明名称 |
Method for improving device performance using epitaxially grown silicon carbon (SiC) or silicon-germanium (SiGe) |
摘要 |
A semiconductor substrate including a field effect transistor (FET) and a method of producing the same wherein a stressor is provided in a recess before the source/drain region is formed. The device has an increased carrier mobility in the channel region adjacent to the gate electrode. |
申请公布号 |
US9331174(B2) |
申请公布日期 |
2016.05.03 |
申请号 |
US201012760688 |
申请日期 |
2010.04.15 |
申请人 |
GLOBALFOUNDRIES Inc. |
发明人 |
Doris Bruce B.;Faltermeier Johnathan E.;Adam Lahir M. Shaik;Haran Balasubramanian S. Pranatharthi |
分类号 |
H01L29/66;H01L29/78;H01L21/02;H01L21/223;H01L21/265;H01L21/28;H01L29/165;H01L29/49;H01L29/51 |
主分类号 |
H01L29/66 |
代理机构 |
DeLio, Peterson & Curcio, LLC |
代理人 |
Curcio Robert;DeLio, Peterson & Curcio, LLC |
主权项 |
1. A semiconductor structure comprising:
a semiconductor substrate; a transistor gate electrode at the surface of said semiconductor substrate; a gate dielectric on said surface of the semiconductor substrate beneath the transistor gate electrode, said gate dielectric having a thickness from about 0.5 to about 20 nanometers; an offset spacer abutting the transistor gate electrode at each end of the transistor gate; a recess in said surface at said each end; an epi layer of doped silicon germanium (SiGe) or silicon carbide (SiC), said epi layer epitaxially grown in, and filling, each said recess to said surface; a source/drain spacer on an end of said epi layer at said surface abutting said offset spacer at said each end; a source/drain extension under each said source/drain spacer, the portion of a respective said epi layer under said each source/drain spacer forming each said source/drain extension; and a source/drain diffusion region formed in said epi layer and said recess at said each source/drain extension, wherein the source/drain spacers above said each source/drain extension delimit said source/drain regions. |
地址 |
Grand Cayman KY |