发明名称 Multi-level inverter
摘要 A multi-level inverter includes: a rectifying unit to rectify received a three-phase voltage; a smoothing unit to receive the rectified voltage and provide the rectified voltage as voltages having different levels to first to third different nodes; and an inverter unit including a plurality of switch units to transfer the voltages having three levels provided from the smoothing unit, wherein the inverter unit includes a first switch unit provided between the first node and a first output terminal, a second switch unit provided between the second node and the first output terminal, a third switch unit provided between the third node and the first output terminal, a fourth switch unit provided between the first node and a second output terminal, a fifth switch unit provided between the second node and the second output terminal, and a sixth switch unit provided between the third node and the second output terminal.
申请公布号 US9331595(B2) 申请公布日期 2016.05.03
申请号 US201414302121 申请日期 2014.06.11
申请人 LSIS CO., LTD. 发明人 Yoo Anno
分类号 H02P6/14;H02M5/458;H02M7/487;H02M7/49;H02M7/483 主分类号 H02P6/14
代理机构 Lee, Hong, Degerman, Kang & Waimey PC 代理人 Lee, Hong, Degerman, Kang & Waimey PC ;Kang Jonathan;Lee Justin
主权项 1. A multi-level inverter comprising: a rectifying unit configured to receive a phase voltage from a 3-phase power source and provide a rectified voltage; a smoothing unit configured to receive the rectified voltage and provide the received rectified voltage as voltages having different levels to first to third nodes; and an inverter unit including a plurality of switch units to transmit the voltages having three levels provided from the smoothing unit to a load, wherein the inverter unit includes a first switch unit provided between the first node and a first output terminal, second switch units provided between the second node and the first output terminal, a third switch unit provided between the third node and the first output terminal, a fourth switch unit provided between the first node and a second output terminal, a fifth switch unit provided between the second node and the second output terminal, and a sixth switch unit provided between the third node and the second output terminal; wherein the first switch unit comprises: a first diode having directivity of a current from the first output terminal to the first node; anda first power semiconductor having a current flow in the opposite direction of the first diode and connecting one side and the other side of the first diode, wherein the third switch unit comprises: a second diode having directivity of a current from the third node to the first output terminal; anda second power semiconductor having a current flow in the opposite direction of the second diode and connecting one side and the other side of the second diode, wherein the fifth switch unit comprises: a first diode having directivity of a current from the second node to the second output terminal;a first power semiconductor having a current flow in the opposite direction of the first diode and connecting one side and the other side of the first diode;a second diode having a current flow in the opposite direction of the first diode and connected to the first diode in series; anda second power semiconductor having a current flow in the opposite direction of the first power semiconductor and connecting one side and the other side of the second diode, and wherein the cathode of the first diode and the cathode of the second diode in the fifth switch unit are directly connected to each other.
地址 Anyang-si KR