Estimation of imperfections of a time-interleaved analog-to-digital converter

摘要

A method of operating a time-interleaved analog-to-digital converter for conversion of an analog input signal to a digital output signal having a sample rate R comprises, for each of at least some activations of an array of constituent analog-to-digital converters, defining first and second sets of the constituent analog-to-digital converters, feeding the analog input of each analog-to-digital converter of the first set with a reference value for imperfection measurements and clocking each analog-to-digital converter of the first set with one of the timing signals, feeding the analog input of each of analog-to-digital converter of the second set with the analog input signal for generation of an intermediate constituent digital output signal at the digital output and clocking each analog-to-digital converter of the second set with one of the timing signals, wherein no timing signal is used to clock two or more of analog-to-digital converters of the second set.

主权项

1. A method of operating a time-interleaved analog-to-digital converter for conversion of an analog input signal to a digital output signal having a sample rate R, wherein the time-interleaved analog-to-digital converter comprises:
a timing circuit for generating a number M of timing signals, wherein each timing signal is a time-shifted copy of a clock signal having a period P; and an array of an integer number N of constituent analog-to-digital converters each having an analog input and a digital output, wherein N is equal to M; the method comprising: for each of at least some activations of the array of constituent analog-to-digital converters:
defining a first set of an integer number K of the constituent analog-to-digital converters and a second set of an integer number L of the constituent analog-to-digital converters, wherein K+L=N, K is at least one and less than N and the first and second sets are non-overlapping;feeding the analog input of each of the constituent analog-to-digital converters of the first set with a reference value for imperfection measurements;clocking each of the constituent analog-to-digital converters of the first set with one of the timing signals;feeding the analog input of each of the constituent analog-to-digital converters of the second set with the analog input signal for generation of an intermediate constituent digital output signal at the digital output; andclocking each of the constituent analog-to-digital converters of the second set with one of the timing signals, wherein no timing signal is used to clock two or more of the constituent analog-to-digital converters of the second set, wherein the array of constituent analog-to-digital converters is activated more than once per the period P.