主权项 |
1. A method of generating an oscillating output signal, the method comprising:
providing a tuning current to a first input of an oscillator having a primary inductor that is inductively coupled with a secondary inductor, wherein the oscillator is configured to generate the oscillating output signal, and wherein the tuning current is provided to the secondary inductor through one or more transconductors; providing a tuning voltage to a second input of the oscillator; wherein a frequency of the oscillator is independently responsive to the tuning current and to the tuning voltage; applying a phase shift to the oscillating output signal, wherein the phase-shifted oscillating output signal is configured to control the one or more transconductors such that a phase of a current flow through the secondary inductor is aligned with a phase of a current flow through the primary inductor, wherein applying the phase shift is performed via a phase shifter comprising:
a p-channel metal oxide semiconductor (PMOS) transistor having a source coupled to a power supply voltage;an n-channel metal oxide semiconductor (NMOS) transistor having a source coupled to a reference potential, wherein:
a gate of the PMOS transistor is coupled to a gate of the NMOS transistor; anda drain of the PMOS transistor is coupled to a drain of the NMOS transistor and a gate of one of the transconductors;a resistor coupled between the gate of the PMOS transistor and the drain of the PMOS transistor; anda capacitor coupled between an output of the oscillator and the gate of the PMOS transistor; and selectively shunting the phase-shifted oscillating output signal to the reference potential via one or more capacitors, wherein the oscillator is included in a phase-locked loop (PLL), wherein a phase modulated signal is generated at an output of the oscillator based on two point modulation (TPM) inputs, and wherein the TPM inputs include a high pass modulation data input and a low pass modulation data input, wherein the tuning current corresponds to the high pass modulation data input and wherein the tuning current is generated by a digital-to-analog converter (DAC) external to the PLL, and wherein the tuning current is responsive to phase modulation data provided to the DAC. |