发明名称 Semiconductor device and manufacturing method thereof
摘要 There are provided a structure of a semiconductor device in which low power consumption is realized even in a case where a size of a display region is increased to be a large size screen and a manufacturing method thereof. A gate electrode in a pixel portion is formed as a three layered structure of a material film containing mainly W, a material film containing mainly Al, and a material film containing mainly Ti to reduce a wiring resistance. A wiring is etched using an IPC etching apparatus. The gate electrode has a taper shape and the width of a region which becomes the taper shape is set to be 1 μm or more.
申请公布号 US9330940(B2) 申请公布日期 2016.05.03
申请号 US201414285718 申请日期 2014.05.23
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Yamazaki Shunpei;Suzawa Hideomi;Kusuyama Yoshihiro;Ono Koji;Koyama Jun
分类号 H01L21/48;G02F1/1345;G02F1/1362;H01L27/12;H01L29/423;H01L29/49;H01L29/786;H01L21/02 主分类号 H01L21/48
代理机构 Fish & Richardson P.C. 代理人 Fish & Richardson P.C.
主权项 1. A method for manufacturing a semiconductor device comprising: forming a semiconductor layer over an insulating surface; forming an insulating film over the semiconductor layer; forming a laminate structure of a first conductive film, a second conductive film, and a third conductive film over the insulating film; forming a source wiring over the insulating film by etching a part of the first conductive film, a part of the second conductive film, and a part of the third conductive film in an inductively coupled plasma; and electrically connecting the source wiring and the semiconductor layer, wherein the source wiring is formed of the first conductive film, the second conductive film, and the third conductive film, and wherein each of a gate electrode and the source wiring has a tapered shape.
地址 Atsugi-shi, Kanagawa-ken JP