发明名称 Power throttling queue
摘要 A power throttling queue includes a queue and a throttling circuit. The queue has multiple entries. Each entry has a data field and a valid field. The multiple entries include a first portion and a selectively disabled second portion. The throttling circuit is coupled to the queue, and selectively disables the second portion in response to a number of valid entries of the first portion.
申请公布号 US9329666(B2) 申请公布日期 2016.05.03
申请号 US201213724583 申请日期 2012.12.21
申请人 ADVANCED MICRO DEVICES, INC. 发明人 Shippy David J.
分类号 G06F1/32 主分类号 G06F1/32
代理机构 Polansky & Associates, P.L.L.C 代理人 Polansky & Associates, P.L.L.C ;Polansky Paul J.
主权项 1. A power throttling queue comprising: a queue having plurality of entries, each entry having a data field and a valid field, said queue filling entries in an order from a lowest ordered entry to a highest ordered entry, and draining entries from a highest ordered valid entry to a lowest ordered valid entry, said plurality of entries comprising a first portion and a selectively disabled second portion; and a throttling circuit coupled to said queue, for selectively disabling said second portion in response to a number of valid entries of said first portion, said throttling circuit keeping said second portion inactive regardless of said number of valid entries of said first portion in response to an override signal.
地址 Sunnyvale CA US