Operation modes for an inverted NAND architecture

摘要

Methods for performing memory operations on a memory array that includes inverted NAND strings are described. The memory operations may include erase operations, read operations, programming operations, program verify operations, and erase verify operations. An inverted NAND string may include a string of inverted floating gate transistors or a string of inverted charge trap transistors. In one embodiment, an inverted floating gate transistor may include a tunneling layer between a floating gate of the inverted floating gate transistor and a control gate of the inverted floating gate transistor. The arrangement of the tunneling layer between the floating gate and the control gate allows electrons to be added to or removed from the floating gate via F-N tunneling between the floating gate and the control gate. The inverted NAND string may be formed above a substrate and oriented such that the inverted NAND string is orthogonal to the substrate.

主权项

1. A method for operating a non-volatile memory, comprising:
determining a selected word line voltage to be applied to a selected word line within a memory array, the memory array includes an inverted NAND string, the inverted NAND string includes a first memory cell transistor, the selected word line is connected to a control gate of the first memory cell transistor; determining an unselected word line voltage to be applied to a first unselected word line within the memory array, the inverted NAND string includes a second memory cell transistor, the first unselected word line is connected to a control gate of the second memory cell transistor; determining a source line voltage to be applied to a first diffusion region at a source-side end of the inverted NAND string; determining a bit line voltage to be applied to a second diffusion region at a drain-side end of the inverted NAND string; and performing a read operation to read data from the first memory cell transistor, the read operation includes applying the selected word line voltage to the selected word line, applying the unselected word line voltage to the first unselected word line, applying the source line voltage to the first diffusion region of the inverted NAND string, and applying the bit line voltage to the second diffusion region of the inverted NAND string, the first diffusion region is of a different conductivity type than the second diffusion region.