发明名称 Semiconductor device
摘要 In a semiconductor device, a conductor pattern is disposed in a position overlapped by a semiconductor chip in a thickness direction over the mounting surface (lower surface) of a wiring board. A solder resist film (insulating layer) covering the lower surface of the wiring board has apertures formed such that multiple portions of the conductor pattern are exposed. The conductor pattern has conductor apertures. The outlines of the apertures and the conductor apertures overlap with each other, in a plan view, respectively.
申请公布号 US9331036(B2) 申请公布日期 2016.05.03
申请号 US201514688953 申请日期 2015.04.16
申请人 RENESAS ELECTRONICS CORPORATION 发明人 Nagasawa Takaharu
分类号 H01L23/053;H01L23/00;H01L23/367;H01L23/498;H01L23/31;H05K1/11 主分类号 H01L23/053
代理机构 McDermott Will & Emery LLP 代理人 McDermott Will & Emery LLP
主权项 1. A semiconductor device, comprising: (a) a wiring board including: a first insulating layer including a first surface, and a second surface opposite to the first surface, a first pattern formed on the second surface, a plurality of second patterns formed on the second surface and also arranged around the first pattern in plan view, and a second insulating layer formed over the second surface of the first insulating layer; (b) a semiconductor chip mounted over the first surface of the first insulating layer, and also including: a plurality of pads (PD) electrically connected with the plurality of second patterns, respectively, wherein the second insulating layer has a plurality of first apertures and a plurality of second apertures, wherein the plurality of first apertures expose a plurality of first parts of the first pattern and a plurality of first parts of the first insulating layer, respectively, and wherein the plurality of second apertures expose the plurality of the second patterns and a plurality of second parts of the first insulating layer, respectively.
地址 Tokyo JP
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