Semiconductor device and method of manufacturing the same

摘要

Provided are a semiconductor device including a high voltage transistor and a low voltage transistor and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate including a high voltage region and a low voltage region; a high voltage transistor formed in the high voltage region and including a first active region, a first source/drain region, a first gate insulating layer, and a first gate electrode; and a low voltage transistor formed in the low voltage region and including a second active region, a second source/drain region, a second gate insulating layer, and a second gate electrode. The second source/drain region has a smaller thickness than a thickness of the first source/drain region.

主权项

1. A method of manufacturing a semiconductor device, the method comprising:
preparing a semiconductor substrate comprising a high voltage region and a low voltage region in which a first active region and a second active region are defined by a first isolation layer and a second isolation layer, respectively; forming a first gate insulating layer on the first active region and on the second active region; forming a first source/drain region in the first active region; and after the first source/drain region is formed, forming a second source/drain region in the second active region having a second thickness that is smaller than a first thickness of the first source/drain region, wherein the preparing of the semiconductor substrate comprises: forming the first isolation layer in the high voltage region and the low voltage region to expose a top surface of the first active region and a top surface of the second active region; and forming the second isolation layer to expose a portion of sides of the second active region by removing a portion of the first isolation layer formed in the low voltage region, wherein the forming of the second isolation layer comprises removing a portion of the first isolation layer formed in the low voltage region along with the first gate insulating layer formed on the second active region.