Block-level sleep logic

摘要

In one embodiment, a processor includes at least one sleep block and a central sleep controller. The at least one sleep block may include at least one execution unit, at least one processor component, and sleep logic. The central sleep controller may be to program the sleep logic to perform at least one sleep transition for the at least one sleep block, and to operate in a first sleep mode. The sleep logic may be to perform the at least one sleep transition for the at least one sleep block without waking the central sleep controller from the first sleep mode. Other embodiments are described and claimed.

主权项

1. A processor comprising a sleep block and a central sleep controller to control a plurality of sleep modes of the processor,
wherein the sleep block includes:
at least one execution unit;at least one processor component;sleep logic to control a plurality of sleep modes of the sleep block; and wherein the central sleep controller in the processor is to:
determine a first sleep transition to be performed by the sleep logic for the sleep block, the first sleep transition including a set of actions required to transition a sleep mode of the sleep block;program the sleep logic with a transition program to perform the first sleep transition of the sleep mode of the sleep block, andinitiate a first sleep mode for the processor as a whole,wherein the sleep logic is to execute the transition program to perform the first sleep transition for the sleep block without waking the central sleep controller from the first sleep mode.