发明名称 Manufacturing method for forming semiconductor structure
摘要 The present invention provides a manufacturing method of a semiconductor structure, comprising the following steps. First, a substrate is provided, a first dielectric layer is formed on the substrate, a metal gate is disposed in the first dielectric layer and at least one source/drain region (S/D region) is disposed on two sides of the metal gate, a second dielectric layer is then formed on the first dielectric layer, a first etching process is then performed to form a plurality of first trenches in the first dielectric layer and the second dielectric layer, wherein the first trenches expose each S/D region. Afterwards, a salicide process is performed to form a salicide layer in each first trench, a second etching process is then performed to form a plurality of second trenches in the first dielectric layer and the second dielectric layer, and the second trenches expose the metal gate.
申请公布号 US9331171(B2) 申请公布日期 2016.05.03
申请号 US201514831881 申请日期 2015.08.21
申请人 UNITED MICROELECTRONICS CORP. 发明人 Hung Ching-Wen;Huang Chih-Sen
分类号 H01L21/336;H01L29/66;H01L29/78;H01L21/768;H01L29/417 主分类号 H01L21/336
代理机构 代理人 Hsu Winston;Margo Scott
主权项 1. A manufacturing method of a semiconductor device, at least comprising the following steps: providing a substrate, wherein a first dielectric layer is formed on the substrate, at least one metal gate is formed in the first dielectric layer and at least one source drain region (S/D region) is disposed on two sides of the metal gate; forming a second dielectric layer on the first dielectric layer; performing a first etching process to form a plurality of first trenches in the first dielectric layer and the second dielectric layer, wherein each first trench exposes each S/D region; performing a salicide process to form a salicide layer in each first trench; and performing a second etching process to form a plurality of second trenches in the first dielectric layer and the second dielectric layer, wherein each second trench exposes each metal gate.
地址 Science-Based Industrial Park, Hsin-Chu TW