发明名称 Nonvolatile memory devices, operating methods thereof and memory systems including the same
摘要 Nonvolatile memory device, operating methods thereof, and memory systems including the same. In the operating method, a ground select line of a first string connected to a bit line may be floated. An erase prohibition voltage may be applied to a ground select line of a second string connected to the bit line. An erase operation voltage may be applied to the first and second strings.
申请公布号 US9330769(B2) 申请公布日期 2016.05.03
申请号 US201414579755 申请日期 2014.12.22
申请人 Samsung Electronics Co., Ltd. 发明人 Han Jinman;Chae Donghyuk
分类号 G11C16/14;G11C16/16;G11C16/04 主分类号 G11C16/14
代理机构 Harness, Dickey & Pierce, P.L.C. 代理人 Harness, Dickey & Pierce, P.L.C.
主权项 1. An operating method of a nonvolatile memory device including at least first through fourth strings on a substrate, each string including a plurality of memory cells and at least one select transistor sequentially stacked on the substrate in a direction perpendicular to the substrate, the operating method comprising: erasing first memory cells of a first portion of the first through fourth strings and preventing erasures of second memory cells of a second portion of the first through fourth strings, select transistors of the first and second strings being connected to a first select line, select transistors of the third and fourth strings being connected to a second select line, select transistors of the first and third strings being connected to a first bit line, and select transistors of the second and fourth strings being connected to a second bit line, wherein each string further includes at least one second select transistor connected between the plurality of memory cells and the substrate, second select transistors of the first and second strings are connected to a third select line, select transistors of the third and fourth strings are connected to a fourth select line, and the erasing includes, applying a first voltage to the substrate at a first time,applying a second voltage less than the first voltage to at least one of the third and fourth select lines corresponding to the first portion at the first time,increasing a voltage of the at least one of the third and fourth select lines corresponding to the first portion at a second time later than the first time, andapplying third voltages less than the first voltage to word lines connected to the first memory cells of the first portion.
地址 Gyeonggi-do KR