| 摘要 |
PROBLEM TO BE SOLVED: To provide a ferroelectric memory suppressing reduction of a residual polarization quantity of a ferroelectric capacitor due to variation of the potential of a plate line and the ferroelectric memory excellent in data holding characteristics.SOLUTION: A memory cell block comprises a plurality of memory cells having a 1T1C configuration connected to j pieces of bit lines and k pieces of word lines and arrayed in j rows and k columns; k pieces of plate lines connected in common to a capacitor of each row of a memory cell block; a plate line drive circuit for selectively applying any of a first potential corresponding to a first logical level and a second potential corresponding to a second logical level, with the plate lines corresponding to the word lines as drive objects, according to the selection of the word lines; and an equalization circuit for performing an equalization processing to each of j pieces of bit lines. The plate line drive circuit is configured to apply a third potential to the plate lines of the drive objects before starting the equalization processing by the equalization circuit.SELECTED DRAWING: Figure 1 |
