SEMICONDUCTOR PACKAGE WITH THROUGH SILICON VIA INTERCONNECT

摘要

The invention provides a semiconductor package with a through silicon via (TSV) interconnect. An exemplary embodiment of the semiconductor package with a TSV interconnect includes a semiconductor substrate, having a front side and a back side. A contact array is disposed on the front side of the semiconductor substrate. An isolation structure is disposed in the semiconductor substrate, underlying the contact array. The TSV interconnect is formed through the semiconductor substrate, overlapping with the contact array and the isolation structure.

主权项

1. A semiconductor package with a through silicon via (TSV) interconnect, comprising:
a semiconductor substrate, having a front side and a back side; a contact array, disposed on the front side of the semiconductor substrate; an isolation structure, disposed in the semiconductor substrate, underlying the contact array; and a TSV interconnect, through the semiconductor substrate, overlapping with the contact array and the isolation structure, wherein the isolation structure comprises shallow trench isolation (STI) features, and the contact array comprises contacts, wherein the STI features avert overlapping with the contacts.