发明名称 SUPERVISORY MEMORY MANAGEMENT UNIT
摘要 A system includes a central processing unit (CPU) to process data with respect to a virtual address generated by the CPU. A first memory management unit (MMU) translates the virtual address to a physical address of a memory with respect to the data processed by the CPU. A supervisory MMU translates the physical address of the first MMU to a storage address for storage and retrieval of the data in the memory. The supervisory MMU controls access to the memory via the storage address generated by the first MMU.
申请公布号 WO2016064403(A1) 申请公布日期 2016.04.28
申请号 WO2014US61965 申请日期 2014.10.23
申请人 HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP 发明人 SHERLOCK, DEREK A.
分类号 G06F12/00;G06F11/07;G06F11/30 主分类号 G06F12/00
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