| 摘要 |
A fractional PLL frequency synthesizer employing 1-bit delta-sigma modulation with distributed error feedback Delta-sigma modulators are widely used in fractional PLL synthesizers in radio tuners.  Distributed error feedback 125,127,129 relocates transmission zeros of the noise transfer function (NTF) from the point z=1 (0 Hz) to conjugate points near z=1 on the unit circle in the z-plane. By locating a pair of conjugate zeros of a third order sigma-delta modulator near the edge of the PLL €™s loop bandwidth, the PLL modulation noise floor is flattened within the loop bandwidth and the maximum noise floor is reduced by 2-3 dB. The technique is beneficial to the design of a fractional PLL, either by improving the noise floor of a stable signal carrier, or when directly modulating the carrier within the loop bandwidth for continuous phase/frequency modulation using the frequency control word as the modulation input. |
