发明名称 Low voltage isolation switch, in particular for a transmission channel for ultrasound applications
摘要 A switching circuit is electrically coupled between a connection terminal and an output terminal of a transmission channel and includes first and second switching transistors electrically coupled in series to each other and having respective body diodes in anti-series, between the connection terminal and the output terminal. The switching circuit comprises a bootstrap circuit connected to respective first and second control terminals of these first and one second switching transistors, as well as to respective first and second voltage references. The bootstrap circuit includes a first parasitic capacitance electrically coupled between the first control terminal and a first bootstrap node, and a second parasitic capacitance electrically coupled between the second control terminal and a second bootstrap node. The parasitic capacitances have value of at least one order of magnitude lower with respect to the gate-source capacitances of the first and second switching transistors.
申请公布号 US9323268(B2) 申请公布日期 2016.04.26
申请号 US201213538598 申请日期 2012.06.29
申请人 STMicroelectronics S.r.l. 发明人 Rossi Sandro;Ricciardo Antonio;Ghisu Davide Ugo
分类号 H03K17/56;H03K17/16;H03K17/30;G05F3/02;H03K19/0185;H03K19/0944 主分类号 H03K17/56
代理机构 Seed IP Law Group PLLC 代理人 Seed IP Law Group PLLC
主权项 1. A switching circuit, comprising: a connection terminal; an output terminal; first and second voltage reference terminals; first and second switching transistors electrically coupled in series to each other, and having respective body diodes coupled in anti-series, between said connection terminal and said output terminal, the first switching transistor having a first control terminal and the second switching transistor having a second control terminal; a bootstrap circuit connected to the first and second control terminals and to the first and second voltage references and including: first and second bootstrap nodes;a first parasitic capacitance electrically coupled directly between said first control gate terminal and the first bootstrap node; anda second parasitic capacitance electrically coupled directly between said second control gate terminal and the second bootstrap node, the first and second parasitic capacitances having capacitance values of at least one order of magnitude lower than gate-source capacitances of said first and second switching transistors.
地址 Agrate Brianza IT