| 发明名称 | Rectification circuit and wireless communication apparatus using the same | ||
| 摘要 | A rectification circuit includes a first field-effect transistor and a bias voltage generation circuit. The field-effect transistor includes a first gate terminal, a first source terminal, a first source region having a first p-type diffusion layer and connected to the first source terminal, a first drain terminal, and a first drain region having a first n-type diffusion layer and connected to the first drain terminal. The bias voltage generation circuit is configured to apply a DC voltage between the first gate terminal and the first drain terminal. | ||
| 申请公布号 | US9325362(B2) | 申请公布日期 | 2016.04.26 |
| 申请号 | US201313973226 | 申请日期 | 2013.08.22 |
| 申请人 | KABUSHIKI KAISHA TOSHIBA | 发明人 | Umeda Toshiyuki;Otaka Shoji |
| 分类号 | H03M5/02;H04B1/18;H02M1/088;H02J5/00;H03K17/30 | 主分类号 | H03M5/02 |
| 代理机构 | Oblon, McClelland, Maier & Neustadt, L.L.P. | 代理人 | Oblon, McClelland, Maier & Neustadt, L.L.P. |
| 主权项 | 1. A rectification circuit comprising: a first field-effect transistor including a first gate terminal,a first source terminal,a first source region having a first p-type diffusion layer and connected to the first source terminal,a first drain terminal, anda first drain region having a first n-type diffusion layer and connected to the first drain terminal; a bias voltage generation circuit configured to apply a DC voltage between the first gate terminal and the first drain terminal. | ||
| 地址 | Minato-ku JP | ||