发明名称 Memory access control apparatus and memory access control method
摘要 A memory is readable by page and erasable by block including a plurality of pages. After a read request to the memory is issued, a memory controller specifies all blocks which can be accessed based on an address specified by a read command, as candidate blocks, and specifies an inspection target page out of pages included in the candidate blocks on the basis of a predetermined rule. The memory controller inspects whether or not there is an error in the inspection target page.
申请公布号 US9323660(B2) 申请公布日期 2016.04.26
申请号 US201213684823 申请日期 2012.11.26
申请人 MegaChips Corporation 发明人 Tamagawa Yuko
分类号 G06F12/00;G06F12/02;G06F3/06;G11C16/34 主分类号 G06F12/00
代理机构 Oblon, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A memory access control apparatus for controlling access to a rewritable nonvolatile semiconductor memory which is readable by page and erasable by block including a plurality of pages, comprising: a read count memory configured to store a read count for said nonvolatile semiconductor memory by block; a specifying part configured to specify an inspection target page after a read request to said nonvolatile semiconductor memory is issued; and an inspection part configured to inspect whether there is an error in said inspection target page, wherein said specifying part includes: a candidate specifying part configured to specify all blocks which can be accessed based on an address specified by a read command, as candidate blocks; a block specifying part configured to specify a block whose read count is the highest among said candidate blocks as an inspection target block by referring to said read count memory; and a page specifying part configured to specify said inspection target page out of said inspection target block on the basis of a predetermined rule.
地址 Osaka-shi JP