发明名称 ショートループアトミックアクセス
摘要 Methods and systems may provide for receiving a request to perform an atomic operation and adding the atomic operation to an execution pipeline of an arithmetic logic unit (ALU) for one or more pending atomic operations if the one or more pending atomic operations are associated with a memory location identified in the request. Additionally, at least a portion of the execution pipeline may bypass the memory location. In one example, adding the atomic operation to the execution pipeline includes populating a linked list with a modification associated with the atomic operation, wherein the linked list is dedicated to the memory location.
申请公布号 JP5908957(B2) 申请公布日期 2016.04.26
申请号 JP20140190035 申请日期 2014.09.18
申请人 インテル・コーポレーション 发明人 コーカー、アルタグ;エス、ジャヤクリシュナ ピー.;ケー、パッタビラマン
分类号 G06F9/34;G06F12/00 主分类号 G06F9/34
代理机构 代理人
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