Method and system for packet processing

摘要

A data processor and a method for processing data is disclosed. The processor has an input port for receiving packets of data to be processed. A master controller acts to analyze the packets and to provide a header including a list of processes to perform on the packet of data and an ordering thereof. The master controller is programmed with process related data relating to the overall processing function of the processor. The header is appended to the packet of data. The packet with the appended header information is stored within a buffer. A buffer controller acts to determine for each packet stored within the buffer based on the header within the packet a next processor to process the packet. The controller then provides the packet to the determined processor for processing. The processed packet is returned with some indication that the processing is done. For example, the process may be deleted from the list of processes. The buffer controller repeatedly makes a determination of a next process until there is no next process for a packet at which time it is provided to an output port.

主权项

1. An integrated circuit comprising:
a data processor disposed on the integrated circuit, the data processor comprising a plurality of processors each operable to process data; an input port operable to receive packets of data; at least one port operable to communicate with each of the plurality of processors; a first processor, also disposed on the integrated circuit, in communication with the at least one port and operable to process received data to insert a header including a list of processes to perform on at least one of the packets of received data and an ordering of the processes specified in the header, the header stored within a packet of data to which the header relates; a buffer that is operable to store data from the at least one port; and a buffer controller of the buffer, the buffer controller operable to:
determine, based on the header, a destination processor of the plurality of processors to process the data packet; andto provide the data packet to the at least one port for provision to the destination processor.