发明名称 Method and apparatus for improved integrated circuit temperature evaluation and IC design
摘要 A method and apparatus generates thermal partitions for metal interconnects of an integrated circuit, based on interconnect self heat data and mutual heat data. Each of the thermal partitions includes data identifying thermally related interconnects and respective temperature values associated with each of the thermally related interconnects. Thermally related partitions that can be computed efficiently and simultaneously and the results then integrated using superposition for the full chips.
申请公布号 US9323870(B2) 申请公布日期 2016.04.26
申请号 US201313874925 申请日期 2013.05.01
申请人 Advanced Micro Devices, Inc. 发明人 Chandra Rajit C.
分类号 G06F17/50 主分类号 G06F17/50
代理机构 Faegre Baker Daniels LLP 代理人 Faegre Baker Daniels LLP
主权项 1. A method, performed by an apparatus, for determining integrated circuit (IC) thermal values for metal interconnects of the IC comprising: generating thermal partitions for metal interconnects of the integrated circuit, based on interconnect self heat data and mutual heat data, wherein each of the thermal partitions comprises data identifying thermally related interconnects and respective temperature values associated with each of the thermally related interconnects; wherein generating thermal partitions comprises: determining a per interconnect temperature for an interconnect of interest using the interconnect self heat data and mutual heat data from interconnects at a desired distance from the interconnect for all interconnects per interconnect layer;forming a thermal region that is comprised of aggressor interconnects to the interconnect of interest when the interconnect temperature is determined to be above a threshold;repeating the determining and forming operation to produce multiple thermal regions; andcombining intersecting regions that have a common interconnect to form a thermal partition.
地址 Sunnyvale CA US