发明名称 |
Systems and methods for FAID follower decoding |
摘要 |
Systems and method relating generally to data processing, and more particularly to systems and methods for decoding information. Some disclosed systems include a first data decoding circuit, a second data decoding circuit, and a data output circuit. The second data decoding circuit is coupled to the first data decoding circuit and the data output circuit. The second data decoding circuit is operable to apply a finite alphabet iterative decoding algorithm to the first decoded output to yield a second decoded output. |
申请公布号 |
US9323606(B2) |
申请公布日期 |
2016.04.26 |
申请号 |
US201314101368 |
申请日期 |
2013.12.10 |
申请人 |
Avago Technologies General IP (Singapore) Pte. Ltd. |
发明人 |
Zhang Yequn;Han Yang;Lim Yu Chin Fabian;Li Shu;Zhang Fan;Yang Shaohua |
分类号 |
H03M13/00;G06F11/10;H03M13/09;H03M13/11;H03M13/27;H03M13/29;H03M13/37;H03M13/41 |
主分类号 |
H03M13/00 |
代理机构 |
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代理人 |
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主权项 |
1. A data processing system, the data processing system comprising:
a first data decoding circuit operable to apply a low density parity check decoding algorithm to a decoder input to yield a first decoded output; and a second data decoding circuit coupled to the first data decoding circuit and a data output circuit, wherein the second data decoding circuit is operable to apply a finite alphabet iterative decoding algorithm to the first decoded output to yield a second decoded output, and wherein the second decoded output is only provided to one or both of the data output circuit or the second data decoding circuit. |
地址 |
Singapore SG |