SerDes PVT detection and closed loop adaptation

摘要

In described embodiments, process, voltage, temperature (PVT) compensation in a serializer/deserializer (SerDes) device employs a closed loop adaptation compensation that is incorporated into the SerDes receiver adaptation process. A detection method, where the adapted decision feedback equalizer (DFE) target level (e.g., tap H0) is monitored, employs this DFE target level when implementing a closed loop variable gain amplifier adaptation. The DFE target level in conjunction with the VGA level is used to control the PVT setting to maintain target SerDes data path gain by detecting aPVT corner condition. The detected PVT corner condition is employed to generate a control signal to further adjust the LEQ and DFE data path differential pair gain as required by the PVT condition.

主权项

1. A method of closed loop compensation in a receiver including a decision feedback equalizer (DFE), the method comprising:
detecting a composite data path gain of the receiver, the data path including a variable gain amplifier (VGA), a linear equalizer (LEQ) and the DFE; receiving a present decision from the data path at both a DFE tap adaptation circuitry and a VGA/LEO adaptation circuitry; based at least in part on the received present decision and further based on one or more past decisions of the data path, adaptively setting path gain, filter, and/or equalizer parameters with the DFE tap adaptation circuitry and VGA/LEQ adaptation circuitry; determining a position of a main cursor tap value of the DFE with respect to a target level to detect data path gain or attenuation; detecting effect of a process, voltage and temperature (PVT) condition based on the determined position of the main cursor tap value against a present value of gain of the VGA when the present value of gain of the VGA is at a lowest or highest gain setting; adjusting the data path gain or attenuation based on the detected PVT condition and the adaptively set path gain,filter, and/or equalizer parameters by adjusting a voltage regulator controlling the VGA gain; and adjusting the data path gain or attenuation based on the detected PVT condition and the adaptively set path gain, filter, and/or equalizer parameters by adjusting a differential pair gain of the LEQ and DFE data path.