发明名称 Resistive memory cell with solid state diode
摘要 Providing for a solid state memory cell having a resistive switching memory cell with rectifier characteristics is described herein. By way of example, the solid state memory cell can have one or more layers creating a resistive switching device capable of achieving and maintaining different electrical resistances in response to different voltages applied to the solid state memory cell. Moreover, the solid state memory cell can comprise two or more layers creating a solid state diode device electrically in series with the resistive switching device. The solid state diode device can be configured to permit very low current through the solid state memory cell at voltages less than a breakdown voltage or reverse breakdown voltage. The rectifier characteristics can mitigate sneak path currents in a crossbar memory array, or similar array, facilitating greater sensing margin, reduced likelihood of memory errors, greater die concentration, fast switching times, and other benefits.
申请公布号 US9324942(B1) 申请公布日期 2016.04.26
申请号 US201313756498 申请日期 2013.01.31
申请人 CROSSBAR, INC. 发明人 Nazarian Hagop;Kumar Tanmay;Jo Sung Hyun
分类号 H01L45/00 主分类号 H01L45/00
代理机构 Amin, Turocy & Watson, LLP 代理人 Amin, Turocy & Watson, LLP
主权项 1. A solid state memory cell, comprising: an ion source layer comprising unbound conductive ions;an insulator layer that is at least in part permeable to the unbound conductive ions of the ion source layer, wherein the ion source layer is directly adjacent to the insulator layer, and the ion source layer and insulator layer form a resistive switching component having a plurality of resistance states in response to respective bias voltages at a pair of conductive electrodes; a p semiconductor layer; and an n semiconductor layer adjacent to the p semiconductor layer, wherein the p semiconductor layer and the n semiconductor layer are exclusive to the memory cell and form a solid-state p-n diode in series with the resistive switching component, wherein the p-n diode mitigates sneak path current flow through the solid state memory cell.
地址 Santa Clara CA US
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