发明名称 |
Methods and systems for detecting a preamble of a data packet in wireless communication systems |
摘要 |
Methods and systems for detecting a preamble of a data packet in wireless communication systems is provided. To determine a preamble from a received signal, which may include a noise-altered preamble bit sequence, linear feedback shift registers (LFSRs) can be used to generate a count of the received preamble, and the count is compared to pre-generated scores to identify a match. Example methods include for each of a number of different preamble orientations of a preamble, generating a count value based on a comparison of bits of the preamble with a random bit sequence to produce a sequence of count values, and comparing the sequence of count values with m sequences of count values. A sequence of count values is identified that includes a maximum number of matching elements, and the received preamble is determined to be one of the m preambles corresponding to the identified sequence. |
申请公布号 |
US9325614(B2) |
申请公布日期 |
2016.04.26 |
申请号 |
US201414197414 |
申请日期 |
2014.03.05 |
申请人 |
KBC RESEARCH FOUNDATION PVT. LTD.;ANNA UNIVERSITY |
发明人 |
Venugopalan Sarad Ammanat;Subramanian Srikanth |
分类号 |
H04B7/00;H04L12/741;H04L29/06;H04W56/00;H04W40/24 |
主分类号 |
H04B7/00 |
代理机构 |
Brundidge & Stanger, P.C. |
代理人 |
Brundidge & Stanger, P.C. |
主权项 |
1. A receiver comprising:
a preamble processor including a register, a first comparator, and a counter, the preamble processor configured to receive a preamble and, for each of a number of different preamble orientations n of the preamble, generate a (1×n) matrix of count values output by the counter based on a comparison by the first comparator of each bit of the preamble with a random bit sequence output by the register; a look-up table; and a second comparator configured to identify a row of an (m×n) matrix, constructed of a plurality number of preambles m and preamble orientations n thereof, retrieved from the look-up table that best matches the (1×n) matrix, and provide the identified row to the preamble processor; wherein m and n are integer values greater than zero; and wherein the preamble processor is further configured to identify one of the number of preambles m corresponding to the identified row as the received preamble. |
地址 |
Chennai IN |