发明名称 Semiconductor device
摘要 In one embodiment, a semiconductor device includes a semiconductor substrate, and first and second transistors of first and second conductivity types on the substrate. The first transistor includes a first gate electrode on the substrate, a first source region of the second conductivity type and a first drain region of the first conductivity type disposed to sandwich the first gate electrode, and a first channel region of the first or second conductivity type disposed between the first source region and the first drain region. The second transistor includes a second gate electrode on the substrate, a second source region of the first conductivity type and a second drain region of the second conductivity type disposed to sandwich the second gate electrode, and a second channel region disposed between the second source region and the second drain region and having the same conductivity type as the first channel region.
申请公布号 US9324714(B2) 申请公布日期 2016.04.26
申请号 US201414179250 申请日期 2014.02.12
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 Hokazono Akira;Goto Masakazu;Kondo Yoshiyuki
分类号 H01L21/70;H01L27/092;H01L21/8238 主分类号 H01L21/70
代理机构 Holtz, Holtz & Volek PC 代理人 Holtz, Holtz & Volek PC
主权项 1. A semiconductor device comprising: a semiconductor substrate; a first transistor of a first conductivity type disposed on the semiconductor substrate; and a second transistor of a second conductivity type disposed on the semiconductor substrate; wherein the first transistor comprises: a first gate electrode disposed on the semiconductor substrate via a first gate insulator;a first source region of the second conductivity type and a first drain region of the first conductivity type disposed to sandwich the first gate electrode; anda first channel region of the first or second conductivity type disposed between the first source region and the first drain region; wherein the second transistor comprises: a second gate electrode disposed on the semiconductor substrate via a second gate insulator;a second source region of the first conductivity type and a second drain region of the second conductivity type disposed to sandwich the second gate electrode; anda second channel region disposed between the second source region and the second drain region and having the same conductivity type as the first channel region; and wherein the semiconductor device further comprises: a well region disposed under the first and second channel regions to be in contact with the first and second channel regions, and having an opposite conductivity type of the first and second channel regions; andone or more interconnects configured to apply reverse bias voltages to pn junctions between the well region and the first and second channel regions, the interconnects being disposed above the semiconductor substrate.
地址 Tokyo JP