发明名称 Multiplier circuit with dynamic energy consumption adjustment
摘要 A fixed point multiplier that can be used in mobile computer systems operating under limited power constraints provides a trade-off between computational accuracy and energy consumption that may be changed dynamically for energy conservation purposes. In one embodiment, the multiplier pre-stores multiplication shift coefficients to eliminate leading-one circuitry normally used in shift and accumulate multipliers.
申请公布号 US9323498(B2) 申请公布日期 2016.04.26
申请号 US201313800709 申请日期 2013.03.13
申请人 Wisconsin Alumni Research Foundation 发明人 Kim Nam Sung
分类号 G06F7/52;G06F7/499;G06F7/53 主分类号 G06F7/52
代理机构 Boyle Fredrickson, S.C. 代理人 Boyle Fredrickson, S.C.
主权项 1. An electronic computer system comprising: a processor providing for execution of arithmetic and logic instructions and including a fixed point multiplier circuit for multiplication of data values, wherein the multiplier circuit provides a variable accuracy; and an accuracy controller communicating with the multiplier circuit to change the accuracy of the multiplier circuit during execution of instructions by the processor.
地址 Madison WI US