发明名称 PLL (PHASE LOCKED LOOP) CIRCUIT AND SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce a leak current that flows to a charge pump circuit while charge pump operation is stopped.SOLUTION: A PLL circuit includes a plurality of charge pump circuits each for generating a charge pump current at a common output node connected to a low-pass filter. The charge pump circuit includes: a first current source as a constant current source of a discharge type to the output node; a first switch for switching a connection of the first current source and the output node; a second current source as a constant current source of a suction type to the output node; and a second switch for switching a connection of the second current source and the output node. At least one of the charge pump circuits includes potential equalization means for regulating a first node between the first current source and the first switch, a second node between the second current source and the second switch, and the output node to an equal potential while the charge pump circuit stops the charge pump operation.SELECTED DRAWING: Figure 2
申请公布号 JP2016063437(A) 申请公布日期 2016.04.25
申请号 JP20140190598 申请日期 2014.09.18
申请人 SONY CORP 发明人 TAKAIRA TORU;ARIMA DAISUKE;TOKIMATSU JUNJI
分类号 H03L7/093;H03L7/087 主分类号 H03L7/093
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