| 摘要 |
PROBLEM TO BE SOLVED: To adjust phases of a clock having a variable frequency and a clock having a fixed frequency to achieve a synchronous relationship therebetween.SOLUTION: A semiconductor integrated circuit includes: means of producing a fixed frequency-divided clock of a fixed frequency from an output clock of a clock source; fixed frequency division state monitoring means for monitoring a state of frequency division of the fixed frequency-divided clock; means of producing variable frequency-divided clock of a variable frequency from the output clock of the clock source; and variable frequency division state monitoring means for monitoring a state of frequency division of the variable frequency-divided clock. During a process of restoring a normal frequency of the variable divided-frequency clock whose frequency has been reduced from the normal frequency, output of the variable frequency-divided clock is halted (603) when the variable frequency division state monitoring means determines that the variable frequency-divided clock will turn "High" in the next cycle, and after that, output of the variable frequency-divided clock is resumed (604) when the fixed frequency division state monitoring means determines that the fixed frequency-divided clock will turn "High" in the next cycle.SELECTED DRAWING: Figure 6 |
