| 摘要 |
PURPOSE: To provide a data processing device capable of suppressing occurrence of skew in clock-embedded data processing.CONSTITUTION: Upon receiving serial data comprising a series of serial data consisting of a plurality of bits including a clock bit, a first capturing unit and a second capturing unit alternately capture the data on a per-bit basis. A clock decision unit decides which data includes the clock. A first serial-parallel conversion unit converts data including the clock into parallel data, while a second serial-parallel conversion unit converts data not including the clock into parallel data. A synthesis unit synthesizes the data converted by the first serial-parallel conversion unit and the data converted by the second serial-parallel conversion unit, and outputs the synthesized data.SELECTED DRAWING: Figure 1 |
