发明名称 |
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME |
摘要 |
Provided are a semiconductor package and a method of fabricating the same. The package substrate includes a hole, which may be used to form a mold layer without any void. The mold layer may be partially removed to expose a lower conductive pattern. Accordingly, it is possible to improve routability of solder balls. |
申请公布号 |
US2016111347(A1) |
申请公布日期 |
2016.04.21 |
申请号 |
US201514984519 |
申请日期 |
2015.12.30 |
申请人 |
Kim Jongkook;Park Su-min;Park Soojeoung;Baek Bona;Im Hohyeuk;Jang Byoungwook;Jung Yoonha |
发明人 |
Kim Jongkook;Park Su-min;Park Soojeoung;Baek Bona;Im Hohyeuk;Jang Byoungwook;Jung Yoonha |
分类号 |
H01L23/31;H01L23/538 |
主分类号 |
H01L23/31 |
代理机构 |
|
代理人 |
|
主权项 |
1. A semiconductor package, comprising:
a package substrate including at least one hole; at least one lower conductive pattern on a bottom surface of the package substrate; at least one semiconductor chip mounted on the package substrate in a flip-chip bonding manner; and a mold layer on the package substrate, the mold layer including,
an upper mold portion covering the at least one semiconductor chip and a top surface of the package substrate, and a lower mold portion connected to the upper mold portion through the at least one hole to cover at least a portion of the bottom surface of the package substrate and expose at least a portion of the lower conductive pattern, and the lower mold portion including a mold bottom surface defining a lower mold hole exposing the at least one portion of the lower conductive pattern. |
地址 |
Hwaseong-si KR |