发明名称 DIVIDING A SINGLE PHASE PULSE-WIDTH MODULATION SIGNAL INTO A PLURALITY OF PHASES
摘要 Dividing a single phase PWM signal into a plurality of phases includes: receiving, from a phase controller by a PWM frequency divider, an input pulse train comprising a period; and dividing, by the PWM frequency divider, the input pulse train amongst a plurality of output phases of the PWM frequency divider, including, at the onset of each period of the input pulse train: providing, on a next output phase of the PWM frequency divider, an output pulse train; and holding all other output phases at a tri-state voltage level.
申请公布号 US2016111960(A1) 申请公布日期 2016.04.21
申请号 US201414519569 申请日期 2014.10.21
申请人 Lenovo (Singapore) Pte.Ltd. 发明人 BARNETTE JAMAICA L.;REMIS LUKE D.
分类号 H02M3/335 主分类号 H02M3/335
代理机构 代理人
主权项 1. A method of dividing a single phase pulse-width modulation (PWM) signal into a plurality of phases, the method comprising: receiving, from a phase controller by a PWM frequency divider, an input pulse train comprising a period; and dividing, by the PWM frequency divider, the input pulse train amongst a plurality of output phases of the PWM frequency divider, including, at the onset of each period of the input pulse train: providing, on a next output phase of the PWM frequency divider, an output pulse train that transitions from a tri-state voltage level to a logic high voltage level at the onset of a period of the input pulse train and transitions from the logic high voltage level to a logic low voltage level toward the end of the period of the input pulse train; andholding all other output phases at the tri-state voltage level that is between the logic high voltage level and the logic low voltage level.
地址 Singapore SG
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