METHOD FOR DRIVING SERDES CIRCUIT

摘要

Provided is a method for driving a serializer/deserializer (SERDES) circuit to minimize waste of the space of the SERDES circuit. The method for driving a circuit comprises: generating a common clock signal from a common phase locked loop (PLL) providing a clock signal to the SERDES circuit; distributing the common clock signal to an eye opening monitor and a data transfer lane included in the SERDES circuit; and driving the eye opening monitor and the data transfer lane by using the common clock signal.